1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the device, and particularly relates to a semiconductor device having an extension region, which is asymmetrical with respect to a gate electrode, as well as a method of manufacturing the device.
2. Description of the Background Art
A conventional transistor, which is used in a high-frequency power amplifier, will now be described. As shown in FIG. 17, a p-type epitaxial layer 110 is formed on a silicon substrate 101. A p-type diffusion region 109 is located at p-type epitaxial layer 110. An N−-extension region 103, an N+-drain region 102 and an N+-source region 104 are located at p-type epitaxial layer 110.
A gate electrode 106 including a polycrystalline silicon film 106b and a tungsten silicide film 106a is located on a p-type diffusion region 109, which is located between N−-extension region 103 and N+-source region 104, with a gate insulating film 105 therebetween.
An interlayer insulating film 108 covering gate electrode 106 is located on silicon substrate 101. Interlayer insulating film 108 is provided with a contact hole 108a exposing the surface of gate electrode 106. Contact hole 108a is filled with, e.g., a plug 111. An aluminum interconnection 112 is located on interlayer insulating film 108, and is electrically connected to plug 111.
Description will now be given on major steps in a method of manufacturing the semiconductor device described above. As shown in FIG. 18, p-type epitaxial layer 110 is formed on silicon substrate 101. Using predetermined resist (not shown) as a mask, p-type ions are implanted into p-type epitaxial layer 110 to form p-type diffusion region 109. Then, gate electrode 106 is formed on p-type epitaxial layer 110 with gate insulating film 105 therebetween. Using gate electrode 106 as a mask, n-type ions are implanted into p-type epitaxial layer 110 to form N−-extension region 103 and others.
Then, as shown in FIG. 19, resist 113 is formed over a portion of the top surface of gate electrode 106 and a portion of the surface of N−-extension region 103 for continuously covering these portions. Using resist 113 as a mask, n-type ions are implanted into p-type epitaxial layer 110 to form N+-drain region 102 and N+-source region 104. Thereafter, resist 113 is removed. In this manner, major portions of the transistor having gate electrode 106, N+-source region 104 and N+-drain region 102 is completed in the semiconductor device.
Particularly, the transistor used in the high-frequency power amplifier is configured to ensure a high breakdown voltage (drain breakdown voltage) between N+-drain region 102 and silicon substrate 101 surrounding the same, and for this purpose, N+-drain region 102 and others are formed such that N−-extension region 103 located between N+-drain region 102 and gate electrode 106 may be longer than the N−-extension region (see FIG. 18) located between gate electrode 106 and N+-source region 104. Thus, the transistor employs a structure, in which N−-extension region 103 is asymmetrical with respect to gate electrode 106.
However, the semiconductor device described above suffers from the following problem. A salicide process has been generally known as a process for reducing resistances of gate electrode 106, N+-source region 104 and N+-drain region 102 in the transistor. In the salicide process, metal silicide layers are formed in a self-aligned fashion at these regions.
In the transistor of the semiconductor device described above, however, a sidewall insulating film is not formed on a side surface of gate electrode 106, as shown in FIG. 17. Therefore, N−-extension region 103, N+-drain region 102, N+-source region 104 and gate electrode 106 are electrically connected when a predetermined metal film is formed for silicidation after the step shown in FIG. 19. Therefore, it is impossible to form the silicide layer by the salicide process.
During the salicide process, impurities in N−-extension region 103 are absorbed into the silicide layer so that the impurity concentration in N−-extension region 103 lowers, and thus, the breakdown voltage lowers.
Such a problem also arises that the metal silicide entering the silicon changes the structure of the transistor.